|
FPGA Devices & Platforms
|
|
0
|
19
|
November 24, 2025
|
|
How to change the default IO voltage for Bank46 on the ZU3EG variant of the iW-G36M SOM?
|
|
0
|
1
|
May 8, 2026
|
|
What is the solderable spacer part, its manufacturer and its recommendations?
|
|
0
|
1
|
May 8, 2026
|
|
What is the HD Bank IO levels of G35M ZU19/ZU17/ZU11 SOM and can it be configured in software?
|
|
0
|
3
|
May 6, 2026
|
|
How to switch from sysvinit to systemctl in the rootfs in G35M MPSoC SOM?
|
|
0
|
4
|
May 4, 2026
|
|
What are the U-Boot commands to initialize and start an SD boot on iWave SOM?
|
|
0
|
6
|
April 30, 2026
|
|
What are the steps to be followed to add the .bit file to the boot image?
|
|
0
|
2
|
April 30, 2026
|
|
How to locate and control the PMOD GPIOs on the G35D devkit within the Zynq UltraScale+ MPSoC environment?
|
|
0
|
3
|
April 24, 2026
|
|
How much should the reference clock be configured in G65D devkit and is it possible to program the clock synth?
|
|
0
|
1
|
April 24, 2026
|
|
Which is the clock generator used in G36M & what are different variants with a lower power clock generator compatible for G36M?
|
|
0
|
1
|
April 24, 2026
|
|
How to configure the clocks to support 10G Ethernet without adding FMC cards?
|
|
0
|
3
|
April 22, 2026
|
|
What is the detailed clock distribution architecture of the G30M SOM, specifically regarding the PS and PL reference clocks and the source for the PCIe bridge?
|
|
0
|
2
|
April 20, 2026
|
|
Does G35M SOM support BBRAM? Is there an application note for BBRAM?
|
|
0
|
2
|
April 20, 2026
|
|
What command is used to check the kernel clk_summary if refclk prints are missing during boot?
|
|
0
|
1
|
April 20, 2026
|
|
Are the ZU5EV and ZU3EG SOMS pin compatible?
|
|
0
|
2
|
April 20, 2026
|
|
How to clean the FSBL firmware build and is it possible to provide work directories for pmufw, atf and u-boot?
|
|
0
|
2
|
April 17, 2026
|
|
How to create SDT from XSA file?
|
|
0
|
3
|
April 17, 2026
|
|
Is it possible to do the current and power consumption for each interface in G36M SOM?
|
|
0
|
1
|
April 16, 2026
|
|
Is it possible to disable the Gigabit Ethernet PHY on the SOM to conserve power?
|
|
0
|
1
|
April 16, 2026
|
|
Is it possible to configure bank 64 voltage in G30M?
|
|
0
|
5
|
April 14, 2026
|
|
How is the 1.5V regulated for the VCC_PSBATT pin on the MPSoC G36M ZU3EG?
|
|
0
|
2
|
April 14, 2026
|
|
How to read the SOC temperature in G30M ZU7CG?
|
|
0
|
2
|
April 14, 2026
|
|
What are the voltage levels for PL HD Banks 45 and 46, and how are they configured in the FSBL?
|
|
0
|
2
|
April 14, 2026
|
|
How to remotely update the ZU19EG firmware (either bistream, BOOT files or rootfs) via ethernet interface in G35D?
|
|
0
|
7
|
April 12, 2026
|
|
Which USB PHY is used in G36M? Is it possible to adjust USB PHY to the 38.4MHz rate, also modifying the USB PHY reference clock will it impact the Linux Device Tree/Driver?
|
|
0
|
2
|
April 9, 2026
|
|
What reference is used to generate the Synthesizer Clocks (PLL’s) in G36M MPSoC SOM?
|
|
0
|
5
|
April 8, 2026
|
|
What is the switching frequency of the switching power regulators used in G36M SOM?
|
|
0
|
2
|
April 8, 2026
|
|
Does VRTC_3V0 feed the VCC_PSBATT signal in G36M SOM?
|
|
0
|
3
|
April 7, 2026
|
|
Is SYS_SYNC_CLOCKP/SYS_SYNC_CLOCKN supported in G36D Dev Kit?
|
|
0
|
3
|
April 7, 2026
|
|
How to disable SATA & display port from system-user.dtsi in G30M?
|
|
0
|
2
|
April 7, 2026
|