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About the Virtex & Kintex Boards & Solutions category
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7
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May 15, 2026
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How to configure QSFP control signals in U-Boot?
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11
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July 16, 2026
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How are the QSFP and SFP modules validated with the QSFP & SFP ports available in the G47D (KU19P) Kintex development kit?
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7
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May 26, 2026
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How to Power up the FMC/FMC+ Card?
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10
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May 26, 2026
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What is the required procedure for powering up a third-party FMC module on the iW-RainboW-G47D if it does not power up automatically?
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9
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May 14, 2026
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Why G47M Kintex Ultrascale+ SOM is not completely booting till kernel?
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11
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April 29, 2026
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Is it possible to hold the Layerscape in reset in G47M SOM?
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0
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11
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April 20, 2026
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Does the battery powered BRAM is properly connected and/or fuse power voltage?
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12
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April 13, 2026
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How is the SYSMON anaolg input and SYSMON_VP signal conenction in VU13P G47M SOM?
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12
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April 7, 2026
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How to disconnect the Layerscape from the I2C bus in VU13P G47D Dev Kit?
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0
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10
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April 7, 2026
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How to resolve the 'multiple definition of yylloc' build error encountered when compiling the U-Boot source code?
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0
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14
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April 6, 2026
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How to access the I2C devices connected to LS I2C2 bus viz Zynq Development Kit?
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0
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11
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April 1, 2026
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How to load the bit file automatically after power on?
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0
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11
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March 31, 2026
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Is it not possible to have more than 64 bits per location in a .mem file for updatemem in G47M?
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0
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12
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March 31, 2026
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Which JTAG cable does iWave recommend for programming?
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0
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10
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March 31, 2026
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How to test FPGA PCIe using G47M KU19P FPGA SOM?
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0
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12
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March 30, 2026
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What is the 12V rail current rating per FMC specification, and how is this supply controlled on the G47M VU13P SOM?
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0
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13
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March 29, 2026
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Does PROGRAM_B pin drive the KU19P G47M SOM?
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0
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11
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March 14, 2026
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How to check the LPMODE status in G47M?
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0
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16
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March 13, 2026
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How are the clocks configured in G47M?
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0
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18
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March 13, 2026
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How is the battery deployed in G47D Devkit?
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0
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12
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March 13, 2026
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What are the limiting part(s) that prevent -40°C to +70°C (or +85°C)?
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0
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14
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March 13, 2026
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What is the input power supported in G47D DevKit?
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0
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12
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March 13, 2026
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How to fix the Fan Sink to the Kintex UltraScale+ FPGA SOM Development platform iG-G47D?
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27
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February 9, 2026
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How to establish the JTAG connection using the Virtex UltraScale+ FPGA SOM Development Platform (iG-G47D)?
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0
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23
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February 9, 2026
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What is the hardware setup guide for iWave iG-G47D Virtex UltraScale+ SOM: Power-on sequence and default UART debug port configuration?
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0
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19
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February 9, 2026
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What Programmer Module is used by iWave in their designs?
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15
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February 2, 2026
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What is the SOMPWR_EN signal functionalilty and how much is the standby current in G52M SOM?
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14
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February 2, 2026
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How to resolve the PLL Lock failure in iG-G47M VU7P SOM?
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17
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February 2, 2026
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What are the Pin and Bank Migration Details of Virtex UltraScale+ SOM iG-G47M VU7P?
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19
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February 2, 2026
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