How PCIe Reset should be configured for Root Complex mode and Endpoint mode?

By default,

MIO 39 is connected to HS_PCIe_Reset pin, it is used as the reset signal in Root Complex mode.

To support Endpoint mode, there is options in SOM to source the PCIe reset either from LPD_MIO18 or PMC_MIO24, which are multiplexed with the GEM1 Ethernet RX clock and the USB STP signal, respectively.

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