To solve FCS error, the transmitter equalization settings (pre-cursor and post-cursor) can be tuned using IBERT.
The recommended procedure is as follows:
- Perform an IBERT test on the required transceiver lanes.
- Identify the lanes exhibiting packet errors and tune the pre-cursor and post-cursor settings to optimize the link performance.
- Once the optimal values have been determined, configure these values in an AXI GPIO and provide them to the corresponding Ethernet Subsystem IP.
- To enable this, select the “Additional GT Control/Status and DRP Ports” option in the IP configuration. This exposes the required input ports, allowing the tuned equalization values to be supplied to the GT transceivers during operation.
Note: Before tuning the GT equalization, also verify that the optical modules, cables and reference clocks are correct, as these can also contribute to FCS errors.
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Please find the detailed product information here:
ZU48/47/43/28/27/25DR RFSoC System on Module