To support SDI loopback, an additional 156.25 MHz clock is required and this clock can be enabled by making minor hardware changes.
SDI Example designs can be downloaded from the FTP link.
Please connect with iWave representative for the hardware changes implementation and the FTP link details.
Alternatively, if these hardware changes are not implemented, a 156.25 MHz clock must be provided externally through the FMC+ interface via GBTCLK4_M2C_P and GBTCLK4_M2C_N.
For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com
Please find the detailed product information here:
Agilex™ 5 SoC FPGASystem on Module