Yes, FPGA programming without a JTAG cable is possible on Altera SoCFPGA devices. For runtime reconfiguration, the FPGA can be loaded from the ARM/HPS side using an .rbf file through FPGA Manager in Linux or U-Boot.
For a persistent and production-oriented solution, an .rpd file is generally preferred (similar to a .jic image). The .rpd image can be programmed into the QSPI flash from the HPS side, and after reboot, the SDM automatically loads the FPGA image during boot, and the corresponding .rbf has to be loaded.
The .sof file is mainly intended for direct JTAG programming through Quartus Programmer and is typically not loaded directly from Linux unless the RSU (Remote System Update) approach is used.
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Please find the detailed product information here:
Agilex™ 7 (R31A/R31B/R31C) SoC FPGA System on Module