By default, the FPGA mode configuration is set to QSPI Flash as configuration device through the pull-up/pull-down resistors on SOM. These signals are not routed to board-to-board headers or DIP switches. However, because JTAG mode is always available independent of the Mode pin settings, JTAG overrides the mode pins setting when JTAG is connected to JTAG header in the devkit.
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Please find the detailed product information here:
Virtex™ UltraScale+™ System on Module