We built a 100G example design and tuned various Tx pre/post-cursor values, confirming board-to-board link up each time.
The CMAC debug ports are mapped to GPIOs and controlled by a bare-metal app on the FPGA. From the LS1021A Linux user space you can set the tuning values via the command line. Use the FPGA design and bare-metal code available from the FTP and follow the README test procedure. Connect with iWave representative for FTP download link.
For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com
Please find the detailed product information here:
Virtex™ UltraScale+™ System on Module