Why the LPDDR4 preset-related errors are observed in earlier Quartus versions(24.x) in G58M Agilex 5 SOM?

In earlier Quartus versions(24.x), a generic EMIF IP was used. In more recent Quartus releases (25.1 and later), this has been replaced by dedicated EMIF IPs for each DDR type (DDR4, LPDDR4, etc.).

Due to this change, the EMIF configuration and memory preset files in user’s existing design are no longer compatible, which is why the LPDDR4 preset-related errors are observed.

The EMIF IP configuration and memory preset properties are updated in the latest Quartus BSP to align with the newer IP structure.

Please connect with iWave representative to try the updated latest BSP.

For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com

Please find the detailed product information here:
Agilex™ 5 SoC FPGASystem on Module