FPGA flashing via JTAG can be performed in boot mode also.
The provided JTAG cable enables communication between the board and the USB-Blaster. Please ensure that the QSPI is cleared prior to this flash process, the cable is connected correctly, and the board is set to Active serial mode (boot mode) before attempting to program JIC file via JTAG.
For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com
Please find the detailed product information here:
Agilex™ 7 R24C SoC FPGA System on Module