In LVDS configuration, if any reset pin or PWM pin or power enable pin, panel enable pins are used from CPU PAD, those can be configured as GPIOs.
The rest of the LVDS signals cannot be configured as GPIO.
Note: The LVDS and MIPI pads are dedicated physical hardware blocks meant for differential signaling (high-speed lanes) with specific input/output drivers, not general-purpose digital I/O.
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