Is it not possible to have more than 64 bits per location in a .mem file for updatemem in G47M?

According to AMD’s UpdateMEM User Guide (UG1580), memory updates are performed based on CPU bus accesses, which are 64 bits wide. This means updatemem only supports up to 64 bits per address in a .mem file, because it follows the 64‑bit CPU bus width.
Refer the AMD document for more details :- AMD Technical Information Portal

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