What are the I/O mapping and Ethernet PHY configuration settings for G36S SOM?

Ethernet PHY Reset and Configuration: The Ethernet PHY reset is controlled via GPIO’s on the DA9063 PMIC, and not from the Zynq MPSoC. The PMIC is managed and configured by the Zynq via the I2C bus.

For specific MIO mapping and pin assignments, please connect with iWave representative.

System Identification: The sbc_board_configuration[7:0] pins are implemented to allow the software to identify the specific SBC hardware revision. These pins serve as an internal reference for version-specific software adjustments and board identification.

For further inquiries, please get in touch with mktg@iwave-global.com

Please find the detailed G36S product information in the below link,