What is the Transceiver Clocking Architecture of G57M & G57D?

The Versal AI Edge G57M GTYP High-Speed Transceiver banks support two independent reference clocks per bank. iG-G57M SOM is architected as,

  • Primary Reference (GTYP_REFCLK1): Default sourced from the on-SOM clock synthesizer.

  • Secondary Reference (GTYP_REFCLK0): Routed to the SOM Board-to-Board (B2B) Connector2, enabling customers to provide a custom, application-specific clock source from their carrier board.

  • Optional Routing: For added versatility, GTYP_REFCLK1 is also connected to SOM B2B Connector2 via resistor pads and these are not populated by default.

This dual-source design ensures that customers have the freedom to utilize the internal SOM clock or implement a bespoke external clocking scheme.

For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com

Please find the detailed product information here:
Versal™ AI Edge System on Module