How VADJ voltage is generated in G42D Devkit?

The VADJ voltage is generated by the regulator ‘TPS628692ARQYR’, from the carrier board . Once the VADJ regulator is enabled through GPIO, its default output voltage is set to 0.8V. To set the required output voltage to 1.8V, it must be configured via I2C. Also, make sure to call the fmc_plus_power_enable() function after configuring the PMIC voltage.

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ZU49/ZU39/ZU29DR RFSoC System on Module