What is the detailed clock distribution architecture of the G30M SOM, specifically regarding the PS and PL reference clocks and the source for the PCIe bridge?

[Moderator]

The G30M SOM includes:

• Dedicated external 33.3333 MHz oscillator for the PS reference clock
• 300 MHz oscillator for the PL reference clock for booting.

The PS GTR clock and the PCIe bridge clock are sourced from the Si5341, and this will not impact PCIe detection.

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Please find the detailed product information here:
Zynq™ UltraScale+™ ZU7/ZU5/ZU4 MPSoC System on Module