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About the Zynq™ UltraScale+™ MPSoC Boards & Solutions category
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7
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May 15, 2026
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How to enable FMC+ power using Bare-Metal for ZU11EG SoM?
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1
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June 9, 2026
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What is the IO Voltage on Bank 65 and Bank 66 on ZU3EG?
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3
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June 9, 2026
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Whether it is possible to configure a different I/O voltage for Bank 94 independently, or is a common voltage mandatory across all banks connected to PMIC LDO4?
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4
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June 5, 2026
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How is the configuration of the Boot Mode Pins PS_MODE[0:2] and what other boot devices does it support?
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2
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June 4, 2026
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How must the reference clock for the endpoint configuration be sourced on the FMC-to-PCIe Adapter?
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4
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June 2, 2026
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Can FMC to PCIe Adapter 1 GBTCLK0_M2C (100 MHz) be used to drive GTH223 REFCLK0 for the PL side xDMA (PCIe x2) Root Port?
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2
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June 2, 2026
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What license is required for generating the bitstream while using JESD IPs?
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0
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7
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May 26, 2026
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How the PMIC LDO1 and LDO4 are configured in G35M ZU11EG SoM
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4
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May 26, 2026
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How the FMC I2C lines are connected from the I2C Mux Switch settings in G35D ZU11EG?
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0
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3
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May 26, 2026
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What are the different methods to program eMMC?
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0
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5
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May 25, 2026
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How to make sure if all the images are avaialble in eMMC?
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2
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May 25, 2026
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What is the use of CVE check?
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1
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May 25, 2026
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Can VCU take video input stream directly on the fly and what is the command for the processed VCU?
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0
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2
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May 25, 2026
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What is the functionality of SI5341B-D-GM clock synthesizer chip used in G30M/G30D?
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0
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6
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May 18, 2026
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What are the FPGA pins that support 300MHz clock input to on G30M/G30D?
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0
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7
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May 18, 2026
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What are the FPGA pins that support 100MHz clock input to G30M/G30D?
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0
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3
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May 18, 2026
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How to change the default IO voltage for Bank46 on the ZU3EG variant of the iW-G36M SOM?
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0
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8
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May 8, 2026
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What is the solderable spacer part, its manufacturer and its recommendations?
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0
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5
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May 8, 2026
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What is the HD Bank IO levels of G35M ZU19/ZU17/ZU11 SOM and can it be configured in software?
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5
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May 6, 2026
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How to switch from sysvinit to systemctl in the rootfs in G35M MPSoC SOM?
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6
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May 4, 2026
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What are the U-Boot commands to initialize and start an SD boot on iWave SOM?
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0
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8
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April 30, 2026
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What are the steps to be followed to add the .bit file to the boot image?
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0
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5
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April 30, 2026
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How to locate and control the PMOD GPIOs on the G35D devkit within the Zynq UltraScale+ MPSoC environment?
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0
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11
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April 24, 2026
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How much should the reference clock be configured in G65D devkit and is it possible to program the clock synth?
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0
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4
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April 24, 2026
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Which is the clock generator used in G36M & what are different variants with a lower power clock generator compatible for G36M?
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0
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2
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April 24, 2026
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How to configure the clocks to support 10G Ethernet without adding FMC cards?
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7
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April 22, 2026
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What is the detailed clock distribution architecture of the G30M SOM, specifically regarding the PS and PL reference clocks and the source for the PCIe bridge?
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6
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April 20, 2026
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Does G35M SOM support BBRAM? Is there an application note for BBRAM?
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4
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April 20, 2026
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What command is used to check the kernel clk_summary if refclk prints are missing during boot?
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5
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April 20, 2026
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