VCCIO for Bank 67 & 68 is from PMIC LDO1 which is 100mA. Supply limit is based on the actual FPGA design and clock speed.
Create actual the FPGA design and find the required current using Vivado tool.
For further product inquiries, please get in touch with our sales team at mktg@iwave-global.com
Please find the detailed product information here:
Zynq™ UltraScale+™ ZU19/ZU17/ZU11 MPSoC System on Module