Why does the DMA reset timeout error occur while booting with the 100G-enabled design?

The DMA reset timeout error occurs because the CMAC IP is not receiving its required reference clock.

In G42M design, the CMAC IP gets its GT reference clock (156.25 MHz) from the FMC+ 100G module. If the FMC+ 100G module is not connected to the board, the clock will not be available and the CMAC IP will not initialize, resulting in the DMA reset timeout error at boot. Please ensure the FMC+ 100G module is physically connected to the board before powering on.

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Please find the detailed product information here:
ZU49/ZU39/ZU29DR RFSoC System on Module