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What is the reference clock requirement for the USB 3.0 interface on the Agilex 5 Development Kit?
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0
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12
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July 15, 2026
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Why is the USB Type-C port not recognized as a programming port on the Agilex 5 Dev Kit?
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0
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9
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July 14, 2026
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Why there is no activity on the UART, after programming the binaries JIC file?
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0
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8
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April 28, 2026
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Does iWave have G58D DisplayPort TPG example design and is it possible to share it?
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0
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7
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April 7, 2026
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Is it necessary to reprogram the DP reference clock to 150MHz?
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0
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7
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April 2, 2026
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Is there any reference design for implementing display port TX link in a PL Design?
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0
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7
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April 2, 2026
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How the HVIO bank voltages are configured in G58M Agilex 5?
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0
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9
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April 2, 2026
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Can the G58D Devkit's PCIe port be configured as both a Root-Port and an End Point?
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0
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8
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March 30, 2026
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What is the supported power on 12V & 3.3V rail in G58D Agilex 5 SoC FPGA?
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0
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9
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March 30, 2026
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How to support SDI loopback and are there any sample projects that use SDI TX and RX?
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0
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7
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March 28, 2026
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How to change the SGMII reference clock at runtime?
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0
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8
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March 27, 2026
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Is the SGMII link the only connection between the FPGA and the SOM? Are there any other reference clocks, MDIO lanes, etc. available for the end-user?
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0
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8
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March 27, 2026
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How SGMII is connected to EMAC0 interface of Agilex 5 SoC?
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0
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9
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March 27, 2026
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How to modify the iWave delivered programming files in G58D Agilex 5?
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0
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7
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March 22, 2026
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How to rectify if the USB pendrive is not detected properly with G58D devkit?
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0
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9
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March 11, 2026
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