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Why a seperate uSD power is used in G63M?
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0
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23
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May 4, 2026
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What are the minimum required signals on B2B connectors that are needed for FPGA to function?
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0
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36
|
February 7, 2026
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Which outputs of the LMK04828 are used for multi-board synchronization?
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0
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29
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January 28, 2026
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How to access GPIO through SYSFS? How to re-assign the direction and use of GPIO from the user space?
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0
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29
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January 8, 2026
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Why does the [DRC PLHDIO-4] error occur during HDIO DRC checks while implementing the IBERT design in Vivado?
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0
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23
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July 22, 2026
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Is the FMC board compatible with Xilinx Evaluation Board VCU108?
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0
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33
|
February 7, 2026
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How to update FMC EEPROM dts nodes in u-boot?
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0
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28
|
January 27, 2026
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Where to find the drivers files mentioned in the "BSP Driver Details" section from software user manual?
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0
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30
|
December 30, 2025
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How much should the reference clock be configured in G65D devkit and is it possible to program the clock synth?
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0
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23
|
April 24, 2026
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How to change the XPIO bank to 1.2V for 703, 704, 705, 712, in Versal Premium G63M SOM?
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0
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27
|
March 11, 2026
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What is the ADC Frequency support in G42M ZU49DR?
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0
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28
|
February 3, 2026
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How to communicate with QSFP Modules through i2C (Read, Write & Verify) in G47M?
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0
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27
|
February 2, 2026
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Can the FAN be controlled based on temperature rather than running continuously?
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0
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30
|
January 13, 2026
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How the device tree should be included in system-user.dtsi?
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0
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35
|
January 8, 2026
|
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How to enable FMC+ power using Bare-Metal for ZU11EG SoM?
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0
|
47
|
June 9, 2026
|
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What are the different methods to program eMMC?
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0
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24
|
May 25, 2026
|
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How to configure the static IP and assigning a single static IP for Ethernet?
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0
|
23
|
April 21, 2026
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How to remotely update the ZU19EG firmware (either bistream, BOOT files or rootfs) via ethernet interface in G35D?
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0
|
28
|
April 12, 2026
|
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How to install additional decryption nodes within NODE-RED?
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0
|
22
|
March 27, 2026
|
|
Is it feasible to modify the FPGA architecture and generate a revised XSA file for software handoff?
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0
|
23
|
March 22, 2026
|
|
How to check whether the EDID is assigned correctly in G37M Q7 SOM?
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0
|
26
|
March 12, 2026
|
|
Which IO can be configued for PCIe Reset in G35M SOM?
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0
|
32
|
February 7, 2026
|
|
How to compile YOCTO in G40M i.MX8MP SMARC SoM?
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0
|
25
|
January 14, 2026
|
|
What is the Power Consumption of G36S ZU4EV SBC?
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0
|
33
|
January 8, 2026
|
|
How is the JTAG connector signals mapped in iWave carrier board?
|
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0
|
28
|
January 8, 2026
|
|
Can the LVDS pins be configured as GPIOs in G50S i.MX93 SBC?
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0
|
24
|
December 30, 2025
|
|
How to clear the env setting or how to get the default env setting in uboot?
|
|
0
|
18
|
December 16, 2025
|
|
How to install new packages which is not available in iWave BSP?
|
|
0
|
18
|
May 22, 2026
|
|
How many CAN ports are supported by G26 and how can they be configured?
|
|
0
|
17
|
May 22, 2026
|
|
What should the spi max frequency be set and how to enable the SPI driver in kernel?
|
|
0
|
18
|
May 21, 2026
|
|
Which USB PHY is used in G36M? Is it possible to adjust USB PHY to the 38.4MHz rate, also modifying the USB PHY reference clock will it impact the Linux Device Tree/Driver?
|
|
0
|
19
|
April 9, 2026
|
|
What are the workarounds for RTC drift issue using G30M MPSoC SOM?
|
|
0
|
23
|
April 1, 2026
|
|
Is there any fine tuning required for 4G network performance in G41G?
|
|
0
|
22
|
April 1, 2026
|
|
Does G58M Agilex 5 SOM support both eMMC and SD interface?
|
|
0
|
22
|
March 29, 2026
|
|
What is the maximum sampling rate for G42M/G60M (ZU49DR/ZU48DR)?
|
|
0
|
24
|
March 26, 2026
|
|
How to fix the Fan Sink to the Kintex UltraScale+ FPGA SOM Development platform iG-G47D?
|
|
0
|
31
|
February 9, 2026
|
|
What is the PMOD voltage level in G35M Devkit?
|
|
0
|
33
|
February 7, 2026
|
|
What are the timing requirements for SD card boot in G35M MPSoC SOM?
|
|
0
|
33
|
February 7, 2026
|
|
What is the Power Requirements for PCIe Endpoint Mode using G35M SOM?
|
|
0
|
32
|
February 7, 2026
|
|
How the clock initialization & DTS are configured in G35M SOM?
|
|
0
|
31
|
February 7, 2026
|
|
What is the use of SI5341 Clock Synthesizer in G35D DevKit?
|
|
0
|
30
|
February 6, 2026
|
|
What are the different LED status available in G35M, G30M & G36S Zync UltraScale+ MPSoC SOM?
|
|
0
|
32
|
February 6, 2026
|
|
How to change the I/O voltage of LDO after boot?
|
|
0
|
25
|
February 6, 2026
|
|
What is the the procedure to SD boot the Zynq MPSoC Ultrascale+ board which supports SD boot?
|
|
0
|
30
|
January 16, 2026
|
|
How to resolve "mkimage_uboot Permission denied" in G40M i.MX8MP SMARC SoM?
|
|
0
|
26
|
January 14, 2026
|
|
How to identify the net name mapping to DTS (device tree) and reference manual pin name and multiplexing?
|
|
0
|
27
|
December 30, 2025
|
|
Why does the Xilinx Video Mixer DRM driver report flip_done timed out and commit wait timed out when setting a display mode using modetest?
|
|
0
|
21
|
July 27, 2026
|
|
What is the minimum RAM requirement for Yocto build environment with G57M/G57D?
|
|
0
|
22
|
June 26, 2026
|
|
What is the IO Voltage on Bank 65 and Bank 66 on ZU3EG?
|
|
0
|
28
|
June 9, 2026
|
|
How the FMC I2C lines are connected from the I2C Mux Switch settings in G35D ZU11EG?
|
|
0
|
20
|
May 26, 2026
|